The present invention relates to a semiconductor memory device and, more particularly, to a semiconductor memory device of a charge pumping MOS FET type.
A prior art semiconductor memory device of the charge pumping MOS FET transistor type is illustrated in FIG. 1. This semiconductor memory device comprises a single-crystalline insulating substrate 1 of, for example, sapphire, a p type semiconductor layer 21 of silicon having an n.sup.+ type source region 22 and an n.sup.+ type drain region 23, a gate insulating layer 31 of silicon dioxide, and a gate electrode 4. A power source 41 is connected to the gate electrode 4. If the p type semiconductor layer 21 is negatively charged up with respect to the source region 22, information "1" is stored in the memory device, and if the potential of the p type semiconductor layer 21 is equal to the potential of the source region 22, information "0" is stored in the memory device.
The writing-in of information "1" into the device of FIG. 1 is effected as follows. The source region 22 is grounded, and the drain region 23 is supplied with a positive voltage V.sub.DD. After a channel 211 has been formed in the portion of the p type semiconductor layer 21 directly beneath the gate insulating layer 31, by application of a positive voltage greater than the threshold voltage V.sub.th to the gate electrode 4, the gate voltage is quickly caused to fall below the threshold voltage V.sub.th. At that time, a portion of the electrons in the channel 211 move to the p type semiconductor layer 21 and recombine with positive holes in the layer 21, so that the number of positive holes is reduced. Because of the reduction of the number of the positive holes, the layer 21 is caused to become negatively biased with respect to the source region 22. Because this bias establishes a reverse bias of the p-n junction between the layer 21 and the source region 22, the layer 21 remains negatively biased with respect to the source region 22. Accordingly, a writing-in of the information "1" has been performed.
A reading-out of the information stored in the device of FIG. 1 in accordance with the above described writing-in process is effected as follows. The above described bias can be regarded as a back gate bias. If there exists a back gate bias, the threshold voltage V.sub.th is enhanced. Thus, the threshold voltage V.sub.th of the device changes its value in accordance with the information "1" or the information "0" of the layer 21. When a voltage of, for example, 5 V is applied to the gate electrode 4 and a voltage of, for example, 5 V is applied to the drain electrode, the value of the current passing through the device is different in accordance with the written-in information "1" or "0". This is why the reading-out of the written-in information is possible.
An erasure of the written-in information "1" is effected by removing the negative bias from the layer 21. Alternatively, an erasure of the written-in information "1" is effected by applying a high voltage of, for example, 15 V to the drain region 23 to cause an avalanche multiplication, so as to inject holes into the layer 21.
However, the prior art semiconductor memory device of FIG. 1 has the disadvantage that, if the length of channel 211 is reduced in accordance with a reduction of the size of the semiconductor memory device, the greater part of the carriers in the channel 211 are caused to go back into either the source region 22 or the drain region 23 and, accordingly, the writing-in of the information becomes difficult and no effective charge pumping is carried out. This disadvantage occurs particularly in the case where the length of the channel 211 is reduced to shorter than 8 .mu.m.
Prior art semiconductor memory devices of the charge pumping MOS FET type are described, for example, in the following two documents:
Nobuo Sasaki et al., "Charge Pumping SOS-MOS Transistor Memory", 1978 IEDM Technical Digest, Pages 356-359, Dec. 1978.
Japanese Patent Application Laid-open No. 54-5635 (corresponding to U.S. patent application No. 960,917 now U.S. Pat. No. 4,250,569).